Project Goal
To bringup 2.6 Linux (MMU enabled) on a 32-bit Microblaze based Spartan 3E FPGA.
Hardware details
Have been already covered in Bringup -1.
Software details
Before reading further; go thru this Linux porting on Microblaze wiki
Setup the toolchain as per the wiki.
BSP setup:
As for Uboot, linux also needs a device tree containing board specific information. A DTS file is generated using XIlinx EDK (details in wiki). This DTS file is copied to arch/microblaze/platform/.
During Linux compilation, a device tree compiler creates a DTC (binary) from DTS which is linked into the linux kernel image.
Specify the following Spartan 3E specific configs either in UI based menuconfig, or by directly modufying .config file: *imp* (make sure this is correct for kernel to boot correctly)
CONFIG_KERNEL_BASE_ADDR=0x88000000
CONFIG_XILINX_MICROBLAZE0_FAMILY="Spartan3e"
CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_BARREL=0
CONFIG_XILINX_MICROBLAZE0_USE_DIV=0
CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1
CONFIG_XILINX_MICROBLAZE0_USE_FPU=0
CONFIG_XILINX_MICROBLAZE0_HW_VER="7.10.a"
This config can be looked up/modified in the Microblaze IP core config in Xilinx EDK.
Compiling:
BSP setup:
As for Uboot, linux also needs a device tree containing board specific information. A DTS file is generated using XIlinx EDK (details in wiki). This DTS file is copied to arch/microblaze/platform/.
During Linux compilation, a device tree compiler creates a DTC (binary) from DTS which is linked into the linux kernel image.
Specify the following Spartan 3E specific configs either in UI based menuconfig, or by directly modufying .config file: *imp* (make sure this is correct for kernel to boot correctly)
CONFIG_KERNEL_BASE_ADDR=0x88000000
CONFIG_XILINX_MICROBLAZE0_FAMILY="Spartan3e"
CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_BARREL=0
CONFIG_XILINX_MICROBLAZE0_USE_DIV=0
CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1
CONFIG_XILINX_MICROBLAZE0_USE_FPU=0
CONFIG_XILINX_MICROBLAZE0_HW_VER="7.10.a"
This config can be looked up/modified in the Microblaze IP core config in Xilinx EDK.
Compiling:
Kernel image with device specific DTC (BSP) linked into the image; has been compiled successfully.
For compiling the linux image with DTS, use the following command (assuming the DTS filename is spartan3e.dts)
'make ARCH=microblaze simpleImage.spartan3e'
The kernel image built will be simpleImage.spartan3e and simpleImage.spartan3e.ub in arch/microblaze/boot (this is the one that has to be used for booting from U-boot since this has a U-boot specific header)
Build-time Issues:
For compiling the linux image with DTS, use the following command (assuming the DTS filename is spartan3e.dts)
'make ARCH=microblaze simpleImage.spartan3e'
The kernel image built will be simpleImage.spartan3e and simpleImage.spartan3e.ub in arch/microblaze/boot (this is the one that has to be used for booting from U-boot since this has a U-boot specific header)
Build-time Issues:
The following error appears during compiling Linux kernel:
arch/microblaze/kernel/head.S: Assembler messages:
arch/microblaze/kernel/head.S:90: Error: unknown opcode "lwr"
arch/microblaze/kernel/head.S: Assembler messages:
arch/microblaze/kernel/head.S:90: Error: unknown opcode "lwr"
Again, this error is because of an older toolchain I have. I went through the code and seemed like this instruction executes if the processor is little-endian (remember, Microblaze is a Softcore and can be programmed as big- or little- endian). Since the default config of the processor is big-endian, I felt this can be commented out (Not too sure on this as the kernel still doesn't boot (it hangs somewhere in head.S), and have asked the question in monstr mailing list)
Running:
Make sure following U-boot params are setup correctly
serverip - host's IP
gatewayip - Gateway IP, if any
ipaddr - Board's IP address
The kernel image is tftp'ed to the start of the RAM (0x88000000 in my case) address using u-boot command:
'tftpboot 0x88000000 simpleImage.spartan3e.ub'
and then 'bootm 0x88000000'
Run-time Issues:
The kernel hangs in head.S. Debugging has been hard; as XMD is not a full-fledged JTAG. The way I am doing is single-stepping head.S and comparing relative instruction addresses printed-out in obj-dump.
Make sure following U-boot params are setup correctly
serverip - host's IP
gatewayip - Gateway IP, if any
ipaddr - Board's IP address
The kernel image is tftp'ed to the start of the RAM (0x88000000 in my case) address using u-boot command:
'tftpboot 0x88000000 simpleImage.spartan3e.ub'
and then 'bootm 0x88000000'
Run-time Issues:
The kernel hangs in head.S. Debugging has been hard; as XMD is not a full-fledged JTAG. The way I am doing is single-stepping head.S and comparing relative instruction addresses printed-out in obj-dump.
<still to come.....>
